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zero-drift, single-supply, rail-to-rail input/output operational amplifiers ad8571/ad8572/ad8574 rev. b information furnished by analog devices is believed to be accurate and reliable. however, no responsibility is assumed by analog devices for its use, nor for any infringements of patents or other rights of third parties that may result from its use. specifications subject to change without notice. no license is granted by implication or otherwise under any patent or patent rights of analog devices. trademarks and registered trademarks are the property of their respective owners. one technology way, p.o. box 9106, norwood, ma 02062-9106, u.s.a. tel: 781.329.4700 www.analog.com fax: 781.461.3113 ?2006 analog devices, inc. all rights reserved. features low offset voltage: 1 v input offset drift: 0.005 v/c rail-to-rail input and output swing 5 v/2.7 v single-supply operation high gain, cmrr, psrr: 130 db ultralow input bias current: 20 pa low supply current: 750 a/op amp overload recovery time: 50 s no external capacitors required applications temperature sensors pressure sensors precision current sensing strain gage amplifiers medical instrumentation thermocouple amplifiers general description this family of amplifiers has ultralow offset, drift, and bias current. the ad8571, ad8572, and ad8574 are single, dual, and quad amplifiers, respectively, featuring rail-to-rail input and output swings. all are guaranteed to operate from 2.7 v to 5 v single supply. the ad857x family provides benefits previously found only in expensive auto-zeroing or chopper-stabilized amplifiers. using analog devices, inc. topology, these zero-drift amplifiers combine low cost with high accuracy. (no external capacitors are required.) using a patented spread-spectrum auto-zero technique, the ad857x family eliminates the intermodulation effects from interaction of the chopping function with the signal frequency in ac applications. with an offset voltage of only 1 v and drift of 0.005 v/c, the ad857x family is perfectly suited for applications where error sources cannot be tolerated. position and pressure sensors, medical equipment, and strain gage amplifiers benefit greatly from nearly zero drift over their operating temperature range. many more systems require the rail-to-rail input and output swings provided by the ad857x family. pin configurations v+ out a nc nc nc = no connect ?in a +in a v? nc 8 7 6 5 1 2 3 4 ad8571 top view (not to scale) 0 1104-001 nc = no connect ad8571 top view (not to scale) nc 1 ? in a 2 +in a 3 v? 4 nc v+ out a nc 8 7 6 5 01104-004 figure 1. 8-lead msop (rm suffix) figure 2. 8-lead soic (r suffix) ?in a +in a v? out b ?in b +in b out a v+ 1 2 3 4 8 7 6 5 ad8572 top view (not to scale) 01104-002 ?in a +in a v? out b ?in b +in b out a v+ 1 2 3 4 8 7 6 5 ad8572 top view (not to scale) 01104-005 figure 3. 8-lead tssop (ru suffix) figure 4. 8-lead soic (r suffix) out a 1 ?in a 2 +in a 3 v+ 4 +in b 5 out d ?in d +in d v? +in c 14 13 12 11 10 ?in b 6 out b 7 ?in c out c 9 8 ad8574 top view (not to scale) 01104-003 out a 1 ?in a 2 +in a 3 v+ 4 +in b 5 out d ?in d +in d v? +in c 14 13 12 11 10 ?in b 6 o ut b 7 ?in c out c 9 8 ad8574 top view (not to scale) 0 1104-006 figure 5. 14-lead tssop (ru suffix) figure 6. 14-lead soic (r suffix) the ad857x family is specified for the extended industrial/ automotive (?40c to +125c) temperature range. the ad8571 single amplifier is available in 8-lead msop and narrow 8-lead soic packages. the ad8572 dual amplifier is available in 8-lead narrow soic and 8-lead tssop surface mount packages. the ad8574 quad amplifier is available in narrow 14-lead soic and 14-lead tssop packages.
ad8571/ad8572/ad8574 rev. b | page 2 of 24 table of contents features .............................................................................................. 1 applications....................................................................................... 1 general description ......................................................................... 1 pin configurations ........................................................................... 1 revision history ............................................................................... 2 specifications..................................................................................... 3 5 v electrical characteristics...................................................... 3 2.7 v electrical characteristics................................................... 4 absolute maximum ratings............................................................ 5 thermal characteristics .............................................................. 5 esd caution.................................................................................. 5 typical performance characteristics ............................................. 6 functional description .................................................................. 14 amplifier architecture .............................................................. 14 basic auto-zero amplifier theory.......................................... 14 auto-zero phase......................................................................... 14 amplificatio n phase ................................................................... 15 high gain, cmrr, psrr.......................................................... 16 maximizing performance t hrough proper layout ................ 16 1/f noise characteristics ........................................................... 17 random auto-zero correction eliminates intermodulation distortion .................................................................................... 17 broadband and external resistor noise considerations.......... 18 output overdrive recovery...................................................... 18 input overvoltage protection ................................................... 18 output phase reversal............................................................... 18 capacitive load drive ............................................................... 19 power-up behavior .................................................................... 19 applications..................................................................................... 20 5 v precision strain gage circuit ............................................ 20 3 v instrumentation amplifier ................................................ 20 high accuracy thermocouple amplifier ............................... 20 precision current meter............................................................ 21 precision voltage comparator.................................................. 21 outline dimensions ....................................................................... 22 ordering guide .......................................................................... 23 revision history 09/06rev. a to rev. b updated format..................................................................universal renumbered figures ..........................................................universal changes to figure 50...................................................................... 14 changes to figure 51...................................................................... 15 changes to figure 66...................................................................... 21 updated outline dimensions ....................................................... 22 changes to ordering guide .......................................................... 23 07/03rev. 0 to rev. a renumbered figures ..........................................................universal changes to ordering guide .............................................................4 change to figure 15. ...................................................................... 16 updated outline dimensions....................................................... 19 10/99revision 0: initial version
ad8571/ad8572/ad8574 rev. b | page 3 of 24 specifications 5 v electrical characteristics v s = 5 v, v cm = 2.5 v, v o = 2.5 v, t a = 25c, unless otherwise noted. table 1. parameter symbol conditions min typ max unit input characteristics offset voltage v os 1 5 v ?40c t a +125c 10 v input bias current i b 10 50 pa ?40c t a +125c 1.0 1.5 na input offset current i os 20 70 pa ?40c t a +125c 150 200 pa input voltage range 0 5 v common-mode rejection ratio cmrr v cm = 0 v to 5 v 120 140 db ?40c t a +125c 115 130 db large signal voltage gain 1 a vo r l = 10 k, v o = 0.3 v to 4.7 v 125 145 db ?40c t a +125c 120 135 db offset voltage drift ?v os /? t ?40c t a +125c 0.005 0.04 v/c output characteristics output voltage high v oh r l = 100 k to gnd 4.99 4.998 v ?40c to +125c 4.99 4.997 v r l = 10 k to gnd 4.95 4.98 v ?40c to +125c 4.95 4.975 v output voltage low v ol r l = 100 k to v+ 1 10 mv ?40c to +125c 2 10 mv r l = 10 k to v+ 10 30 mv ?40c to +125c 15 30 mv short-circuit limit i sc 25 50 ma ?40c to +125c 40 ma output current i o 30 ma ?40c to +125c 15 ma power supply power supply rejection ratio psrr v s = 2.7 v to 5.5 v 120 130 db ?40c t a +125c 115 130 db supply current/amplifier i sy v o = 0 v 850 975 a ?40c t a +125c 1000 1075 a dynamic performance slew rate sr r l = 10 k 0.4 v/s overload recovery time 0.05 0.3 ms gain bandwidth product gbp 1.5 mhz noise performance voltage noise e n p-p 0 hz to 10 hz 1.3 v p-p e n p-p 0 hz to 1 hz 0.41 v p-p voltage noise density e n f = 1 khz 51 nv/hz current noise density i n f = 10 hz 2 fa/hz 1 gain testing is dependent upon test bandwidth.
ad8571/ad8572/ad8574 rev. b | page 4 of 24 2.7 v electrical characteristics v s = 2.7 v, v cm = 1.35 v, v o = 1.35 v, t a = 25c, unless otherwise noted. table 2. parameter symbol conditions min typ max unit input characteristics offset voltage v os 1 5 v ?40c t a +125c 10 v input bias current i b 10 50 pa ?40c t a +125c 1.0 1.5 na input offset current i os 10 50 pa ?40c t a +125c 150 200 pa input voltage range 0 2.7 v common-mode rejection ratio cmrr v cm = 0 v to 2.7 v 115 130 db ?40c t a +125c 110 130 db large signal voltage gain 1 a vo r l = 10 k, v o = 0.3 v to 2.4 v 110 140 db ?40c t a +125c 105 130 db offset voltage drift ?v os /?t ?40c t a +125c 0.005 0.04 v/c output characteristics output voltage high v oh r l = 100 k to gnd 2.685 2.697 v ?40c to +125c 2.685 2.696 v r l = 10 k to gnd 2.67 2.68 v ?40c to +125c 2.67 2.675 v output voltage low v ol r l = 100 k to v+ 1 10 mv ?40c to +125c 2 10 mv r l = 10 k to v+ 10 20 mv ?40c to +125c 15 20 mv short-circuit limit i sc 10 15 ma ?40c to +125c 10 ma output current i o 10 ma ?40c to +125c 5 ma power supply power supply rejection ratio psrr v s = 2.7 v to 5.5 v 120 130 db ?40c t a +125c 115 130 db supply current/amplifier i sy v o = 0 v 750 900 a ?40c t a +125c 950 1000 a dynamic performance slew rate sr r l = 10 k 0.5 v/s overload recovery time 0.05 ms gain bandwidth product gbp 1 mhz noise performance voltage noise e n p-p 0 hz to 10 hz 2.0 v p-p voltage noise density e n f = 1 khz 94 nv/hz current noise density i n f = 10 hz 2 fa/hz 1 gain testing is dependent upon test bandwidth.
ad8571/ad8572/ad8574 rev. b | page 5 of 24 absolute maximum ratings table 3. parameter rating supply voltage 6 v input voltage gnd to v s + 0.3 v differential input voltage 1 5.0 v esd (human body model) 2000 v output short-circuit duration to gnd indefinite storage temperature range rm, ru, and r packages ?65c to +150c operating temperature range ad8571a/ad8572a/ad8574a ?40c to +125c junction temperature range rm, ru, and r packages ?65c to +150c lead temperature range (soldering, 60 sec) 300c 1 differential input voltage is limited to 5.0 v or the supply voltage, whichever is less. stresses above those listed under absolute maximum ratings may cause permanent damage to the device. this is a stress rating only; functional operation of the device at these or any other conditions above those indicated in the operational section of this specification is not implied. exposure to absolute maximum rating conditions for extended periods may affect device reliability. thermal characteristics ja is specified for the worst-case conditions, that is, ja is specified for a device soldered in a circuit board for soic and tssop packages. table 4. thermal resistance package type ja jc unit 8-lead msop (rm) 190 44 c/w 8-lead tssop (ru) 240 43 c/w 8-lead soic (r) 158 43 c/w 14-lead tssop (ru) 180 36 c/w 14-lead soic (r) 120 36 c/w esd caution
ad8571/ad8572/ad8574 rev. b | page 6 of 24 typical performance characteristics 180 0 120 100 60 20 40 80 140 160 ?1.5 ?2.5 ?0.5 0.5 1.5 2.5 number of amplifiers offset voltage (v) v s = 2.7v v cm = 1.35v t a = 25c 01104-007 figure 7. input offset voltage distribution at 2.7 v ?40c +25c +85c 50 40 30 20 10 0 ?20 ?10 ?30 012 4 35 input bias current (pa) input common-mode voltage (v) v s = 5v t a = ?40c, +25c, +85c 01104-008 figure 8. input bias current vs. common-mode voltage 1500 ?2000 1000 500 0 ?1000 ?1500 ?500 012345 input bias current (pa) common-mode voltage (v) v s = 5v t a = 125c 01104-009 figure 9. input bias current vs. common-mode voltage 180 0 120 100 60 20 40 80 140 160 ?1.5 ?2.5 ?0.5 0.5 1.5 2.5 number of amplifiers offset voltage (v) v s = 5v v cm = 2.5v t a = 25c 0 1104-010 figure 10. input offset voltage distribution at 5 v 12 10 8 6 4 2 0 01234 6 5 number of amplifiers input offset drift (nv/c) v s = 5v v cm = 2.5v t a = ?40c to +125c 0 1104-011 figure 11. input offset voltage drift distribution at 5 v source sink 10k 1k 100 10 1 0.1 0.0001 0.001 0.01 0.1 100 10 1 output voltage (mv) load current (ma) v s = 5v t a = 25c 01104-012 figure 12. output voltage to supply rail vs. output current at 5 v
ad8571/ad8572/ad8574 rev. b | page 7 of 24 source sink 10k 1k 100 10 1 0.1 0.0001 0.001 0.01 0.1 1 10 100 output voltage (mv) load current (ma) v s = 2.7v t a = 25c 01104-013 figure 13. output voltage to supply rail vs. output current at 2.7 v 1000 750 500 250 0 ?75 ?50 ?25 0 25 50 75 100 125 150 input bias current (pa) temperature (c) v cm = 2.5v v s = 5v 01104-014 figure 14. bias current vs. temperature 5v 2.7v 1.0 0.8 0.6 0.4 0.2 0 ?75 ?25?50 25 75 0 50 100 150125 supply current (ma) temperature (c) 01104-015 figure 15. supply current vs. temperature 800 200 100 300 400 500 600 700 0 01 2 34 5 6 supply current per amplifier (a) supply voltage (v) t a = 25c 01104-016 figure 16. supply current vs. supply voltage 45 90 135 180 225 270 0 60 40 50 10 20 30 ?10 0 ?40 ?30 ?20 10k 100k 1m 10m 100m open-loop gain (db) phase shift (degrees) frequency (hz) v s = 2.7v c l = 0pf r l = 01104-017 figure 17. open-loop gain and phase shift vs. frequency at 2.7 v 45 90 135 180 225 270 0 60 40 50 10 20 30 ?10 0 ?40 ?30 ?20 10k 100k 1m 10m 100m open-loop gain (db) phase shift (degrees) frequency (hz) v s = 5v c l = 0pf r l = 01104-018 figure 18. open-loop gain and phase shift vs. frequency at 5 v
ad8571/ad8572/ad8574 rev. b | page 8 of 24 60 40 50 10 20 30 ?10 0 ?40 ?30 ?20 100 10k 1k 1m 100k 10m closed-loop gain (db) frequency (hz) v s = 2.7v c l = 0pf r l = 2k ? a v = ?100 a v = ?10 a v = +1 01104-019 figure 19. closed-loop gain vs. frequency at 2.7 v 60 40 50 10 20 30 ?10 0 ?40 ?30 ?20 100 10k 1k 1m 100k 10m closed-loop gain (db) frequency (hz) v s = 5v c l = 0pf r l = 2k ? a v = ?100 a v = ?10 a v = +1 01104-020 figure 20. closed-loop gain vs. frequency at 5 v 300 240 270 150 180 210 90 120 0 30 60 100 10k 1k 10m output impedance ( ? ) frequency (hz) a v = 1 a v = 100 a v = 10 v s = 2.7v 0 1104-021 1m 100k figure 21. output impedanc e vs. frequency at 2.7 v 300 240 270 150 180 210 90 120 0 30 60 100 10k 1k 10m output impedance ( ? ) frequency (hz) a v = 1 a v = 100 a v = 10 v s = 5v 01104-022 1m 100k figure 22. output impeda nce vs. frequency at 5 v v s = 2.7v c l = 300pf r l = 2k ? a v = 1 2s 500mv 0 1104-023 figure 23. large signal transient response at 2.7 v v s = 5v c l = 300pf r l = 2k ? a v = 1 01104-024 5s 1v figure 24. large signal transient response at 5 v
ad8571/ad8572/ad8574 rev. b | page 9 of 24 v s = 1.35v c l = 50pf r l = a v = 1 01104-025 5s 50mv figure 25. small signal transient response at 2.7 v v s = 2.5v c l = 50pf r l = a v = 1 5s 50mv 0 1104-026 figure 26. small signal transient response at 5 v 0 10 100 1k 10k capacitance (pf) 01104-027 small signal overshoot (%) 50 45 0 40 35 30 25 20 15 10 5 ?os +os v s = 1.35v r l = 2k ? t a = 25c figure 27. small signal overshoot vs. load capacitance at 2.7 v 45 0 5 10 15 20 25 30 35 40 10 100 1k 10k small signal overshoot (%) capacitance (pf) v s = 2.5v r l = 2k ? t a = 25c ?os +os 01104-028 figure 28. small signal overshoot vs. load capacitance at 5 v 0v v in v out 0v bottom scale: 1v/div top scale: 200mv/div v s = 2.5v v in = ?200mv p-p (ret to gnd) c l = 0pf r l = 10k ? a v = ?100 20s 1v 0 1104-029 figure 29. positive overvoltage recovery 0v v in v out 0v bottom scale: 1v/div top scale: 200mv/div 20s 1v v s = 2.5v v in = 200mv p-p (ret to gnd) c l = 0pf r l = 10k ? a v = ?100 01104-030 figure 30. negative overvoltage recovery
ad8571/ad8572/ad8574 rev. b | page 10 of 24 200s 1v v s = 2.5v r l = 2k ? a v = ?100 v in = 60mv p-p 01104-031 figure 31. no phase reversal 100 10k 1k 1m 100k 10m cmrr (db) frequency (hz) v s = 2.7v 140 80 100 120 60 0 20 40 01104-032 figure 32. cmrr vs. frequency at 2.7 v 100 10k 1k 10m cmrr (db) frequency (hz) v s = 5v 140 80 100 120 60 0 20 40 01104-033 1m 100k figure 33. cmrr vs. frequency at 5 v 100 10k 1k 1m 100k 10m psrr (db) frequency (hz) v s = 1.35v 140 80 100 120 60 0 20 40 ?psrr +psrr 01104-034 figure 34. psrr vs. frequency at 1.35 v 100 10k 1k 10m psrr (db) frequency (hz) v s = 2.5v 140 80 100 120 60 0 20 40 ?psrr +psrr 01104-035 1m 100k figure 35. psrr vs. frequency at 2.5 v 100 10k 1k 100k 1m output swing (v p-p) frequency (hz) 3.0 1.5 2.0 2.5 1.0 0 0.5 v s = 1.35v r l = 2k ? a v = 1 thd + n < 1% t a = 25c 01104-036 figure 36. maximum output swing vs. frequency at 2.7 v
ad8571/ad8572/ad8574 rev. b | page 11 of 24 100 10k 1k 100k 1m output swing (v p-p) frequency (hz) 5.5 0 0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0 4.5 5.0 v s = 2.5v r l = 2k ? a v = 1 thd + n < 1% t a = 25c 01104-037 figure 37. maximum output swing vs. frequency at 5 v 0 v v s = 1.35v a v = 120,000 1s 50mv 0 1104-038 figure 38. 0.1 hz to 10 hz noise at 2.7 v 1s 50mv v s = 2.5v a v = 120,000 01104-039 figure 39. 0.1 hz to 10 hz noise at 5 v v s = 2.7v r s = 0 ? 312 364 208 260 104 156 52 0 0.5 1.0 1.5 2.0 2.5 e n (nv/ hz) frequency (khz) 0 1104-040 figure 40. voltage noise density at 2.7 v from 0 hz to 2.5 khz v s = 2.7v r s = 0 ? 96 112 64 80 32 48 16 0 5 10 15 20 25 e n (nv/ hz) frequency (khz) 01104-041 figure 41. voltage noise density at 2.7 v from 0 hz to 25 khz v s = 5v r s = 0 ? 156 182 104 130 52 78 26 0 0.5 1.0 1.5 2.0 2.5 e n (nv/ hz) frequency (khz) 01104-042 figure 42. voltage noise density at 5 v from 0 hz to 2.5 khz
ad8571/ad8572/ad8574 rev. b | page 12 of 24 v s = 5v r s = 0 ? 96 112 64 80 32 48 16 0 5 10 15 20 25 e n (nv/ hz) frequency (khz) 01104-043 figure 43. voltage noise density at 5 v from 0 hz to 25 khz v s = 5v r s = 0 ? 180 210 120 150 60 90 30 05 e n (nv/ hz) frequency (khz) 1 0 01104-044 figure 44. voltage noise density at 5 v from 0 hz to 10 hz v s = 2.7v to 5.5v 150 145 140 130 135 125 ?75 ?50 ?25 0 25 50 75 100 125 150 power supply rejection (db) temperature (c) 01104-045 figure 45. power supply rejection vs. temperature 50 30 40 10 ?30 ?10 20 0 ?40 ?20 ?50 ?75 ?50 ?25 0 25 50 75 100 125 150 short-circuit current (ma) temperature (c) v s = 2.7v i sc? i sc+ 01104-046 figure 46. output short-circ uit current vs. temperature
ad8571/ad8572/ad8574 rev. b | page 13 of 24 100 60 80 20 ?60 ?20 40 0 ?80 ?40 ?100 ?75 ?50 ?25 0 25 50 75 100 125 150 short-circuit current (ma) temperature (c) v s = 5v i sc? i sc+ 01104-047 figure 47. output short-circ uit current vs. temperature ?75 ?50 ?25 0 25 50 75 100 125 150 output voltage swing (mv) temperature (c) v s = 5v r l = 1k ? r l = 10k ? r l = 100k ? 100 250 200 0 150 25 50 75 125 175 225 01104-048 figure 48. output voltage to supply rail vs. temperature ?75 ?50 ?25 0 25 50 75 100 125 150 output voltage swing (mv) temperature (c) v s = 5v 100 250 200 0 150 25 50 75 125 175 225 01104-049 r l = 1k ? r l = 10k ? r l = 100k ? figure 49. output voltage to supply rail vs. temperature
ad8571/ad8572/ad8574 rev. b | page 14 of 24 functional description the ad8571/ad8572/ad8574 ar e cmos amplifiers that achieve their high degree of precision through random frequency auto-zero stabilization. the autocorrection topology allows the ad857x to maintain its low offset voltage over a wide temperature range, and the randomized auto-zero clock eliminates any intermodulation distortion (imd) errors at the amplifier output. the ad857x can be run from a single-supply voltage as low as 2.7 v. the extremely low offset voltage of 1 v and no imd products allows the amplifier to be easily configured for high gains without risk of excessive output voltage errors. this makes the ad857x an ideal amplifier for applications requiring both dc precision and low distortion for ac signals. the extremely small temperature drift of 5 nv/c ensures a minimum of offset voltage error over its entire temperature range of ?40c to +125c. these combined features make the ad857x an excellent choice for a variety of sensitive measurement and automotive applications. amplifier architecture each ad857x op amp consists of two amplifiers: a main amplifier and a secondary amplifier that is used to correct the offset voltage of the main amplifier. both consist of a rail-to-rail input stage, allowing the input common-mode voltage range to reach both supply rails. the input stage consists of an nmos differential pair operating concurrently with a parallel pmos differential pair. the outputs from the differential input stages are combined in another gain stage whose output is used to drive a rail-to-rail output stage. the wide voltage swing of the amplifier is achieved by using two output transistors in a commo n-source configuration. the output voltage range is limited by the drain-to-source resistance of these transistors. as the amplifier is required to source or sink more output current, the voltage drop across these transistors increases due to their on resistance (rds). simply put, the output voltage does not swing as close to the rail under heavy output current conditions as it does with light output current. this is a characteristic of all rail-to-rail output amplifiers. figure 12 and figure 13 show how close the output voltage can get to the rails with a given output current. the output of the ad857x is short- circuit protected to approximately 50 ma of current. the ad857x amplifiers have exceptional gain, yielding greater than 120 db of open-loop gain with a load of 2 k. because the output transistors are configured in a common-source configura- tion, the gain of the output stage, and thus the open-loop gain of the amplifier, is dependent on the load resistance. open-loop gain decreases with smaller load resistances. this is another characteristic of rail-to-rail output amplifiers. basic auto-zero amplifier theory autocorrection amplifiers are not a new technology. various ic implementations have been available for more than 15 years and some improvements have been made over time. the ad857x design offers a number of significant performance improve- ments over older versions while attaining a very substantial reduction in device cost. this section offers a simplified explanation of how the ad857x is able to offer extremely low offset voltages and high open-loop gains. as noted in the amplifier architecture section, each ad857x op amp contains two internal amplifiers. one is used as the primary amplifier, the other as an autocorrection, or nulling, amplifier. each amplifier has an associated input offset voltage that can be modeled as a dc voltage source in series with the noninverting input. in figure 50 and figure 51 , these are labeled as v osx , where x denotes the amplifier associated with the offset: a for the nulling amplifier, b for the primary amplifier. the open-loop gain for the +in and ?in inputs of each amplifier is given as a x . both amplifiers also have a third voltage input with an associated open-loop gain of b x . there are two modes of operation determined by the action of two sets of switches in the amplifier: an auto-zero phase and an amplification phase. auto-zero phase in this phase, all a switches are closed and all b switches are opened. here, the nulling amplifier is taken out of the gain loop by shorting its two inputs together. of course, there is a degree of offset voltage, shown as v osa , inherent in the nulling amplifier that maintains a potential difference between the +in and ?in inputs. the nulling amplifier feedback loop is closed through a 2 and v osa appears at the output of the nulling amp and on c m1 , an internal capacitor in the ad857x. mathematically, we can express this in the time domain as ][][ ][ tvbtvatv oaa osaa oa ? = (1) this also can be expressed as [] [ ] a osaa oa b tva tv + = 1 (2) this shows that the offset voltage of the nulling amplifier times a gain factor appears at the output of the nulling amplifier and thus on the c m1 capacitor.
ad8571/ad8572/ad8574 rev. b | page 15 of 24 v in+ v in? v out a b a a a b v osa + v osb + b b c m2 c m1 a v nb v na ?b a v oa b 0 1104-050 figure 50. auto-zero phase of the amplifier amplification phase when the b switches close and the a switches open for the amplification phase, this offset voltage remains on c m1 and essentially corrects any error from the nulling amplifier. the voltage across c m1 is designated as v na . the potential difference between the two inputs to the primary amplifier is designated as v in , or v in = (v in+ ? v inC ). the output of the nulling amplifier can then be expressed as > > > > tvbtvtvatv naa osa in a oa ( (3) v in+ v in? v out a b a a a b v osa + v osb + b b c m2 c m1 a v nb v na ?b a v oa b 01104-051 figure 51. output phase of the amplifier because a is now open and there is no place for c m1 to discharge, the voltage (v na ) at the present time (t) is equal to the voltage at the output of the nulling amp (v oa ) at the time when a was closed. if the period of the autocorrection switching frequency is designated as t s , then the amplifier switches between phases every 0.5 t s . therefore, in the amplification phase > s na na ttvtv 2 1 (4) and substituting equation 4 and equation 2 into equation 3 yields > > > a s osaaa osaa in a oa b ttvba tvatvatv 1 2 1 (5) for the sake of simplification, it can be assumed that the autocorrection frequency is much faster than any potential change in v osa or v osb . this is a good assumption since changes in offset voltage are a function of temperature variation or long-term wear time, both of which are much slower than the auto-zero clock frequency of the ad857x. this effectively makes the v os time invariant, and equation 5 can be rewritten as > > a osaaa osaa a in a oa b vbavba tvatv 1 1 (6) or > > a osa in a oa b v tvatv 1 (7) here, the auto-zeroing becomes apparent. note that the v os term is reduced by a 1 + b a factor. this shows how the nulling amplifier has greatly reduced its own offset voltage error even before correcting the primary amplifier. thus, the primary amplifier output voltage is the voltage at the output of the ad857x amplifier. it is equal to > > nbb osb inb out vbvtvatv (8) in the amplification phase, v oa = v nb , so this can be rewritten as > > > a osa in a b osb b inb out b v tvabvatvatv 1 (9) combining terms yields > > osb b a osa b a b a bin out va b vba baatvtv 1 (10) the ad857x architecture is optimized in such a way that a a = a b and b a = b b and b a >> 1. in addition, the gain product to a a b b is much greater than a b . thus, equation 10 can be simplified to > > ) ( osb osaaaa in out vvabatvtv (11) most obvious is the gain product of both the primary and nulling amplifiers. this a a b a term is what gives the ad857x its extremely high open-loop gain. to understand how v osa and v osb relate to the overall effective input offset voltage of the complete amplifier, set up the generic amplifier equation of ) ( , effos in out vvkv u (12) where k is the open-loop gain of an amplifier and v os , eff is its effective offset voltage. putting equation 12 into the form of equation 11 gives > > aaeffosaa in out bavbatvtv , (13) therefore a osb osa effos b vv v , (14)
ad8571/ad8572/ad8574 rev. b | page 16 of 24 thus, the offset voltages of both the primary and nulling amplifiers are reduced by the g ain f actor b a . this takes a typical input offset voltage from several millivolts down to an effective input offset voltage of submicrovolts. this autocorrection scheme makes the ad857x family of amplifiers extremely precise. high gain, cmrr, psrr common-mode and power supply rejection are indications of the amount of offset voltage an amplifier has as a result of a change in its input common-mode or power supply voltages. as shown in the amplification phase section, the autocorrection architecture of the ad857x allows it to effectively minimize offset voltages. the technique also corrects for offset errors caused by common-mode voltage swings and power supply variations. this results in superb cmrr and psrr figures in excess of 130 db. because the autocorrection occurs continu- ously, these figures can be maintained across the entire temperature range of the device, from ?40c to +125c. maximizing performance through proper layout to achieve the maximum performance of the extremely high input impedance and low offset voltage of the ad857x, care should be taken in the circuit board layout. the pc board surface must remain clean and free of moisture to avoid leakage currents between adjacent traces. surface coating of the circuit board reduces surface moisture and provides a humidity barrier, reducing parasitic resistance on the board. the use of guard rings around the amplifier inputs further reduces leakage currents. figure 52 shows how the guard ring should be configured and figure 53 shows the top view of how a surface mount layout can be arranged. the guard ring does not need to be a specific width, but it should form a continuous loop around both inputs. by setting the guard ring voltage equal to the voltage at the nonin- verting input, parasitic capacitance is minimized as well. for further reduction of leakage currents, components can be mounted to the pc board using teflon? standoff insulators. v out v out v out v in ad8572 v in ad8572 v in ad8572 01104-052 figure 52. guard ring layout and connections to reduce pc board leakage currents v? v + v ref v ref v in1 v in2 guard ring r1 r2 r2 r1 ad8572 guard ring 01104-053 figure 53. top view of ad8572 soic layout with guard rings other potential sources of offset error are thermoelectric voltages on the circuit board. this voltage, also called seebeck voltage, occurs at the junction of two dissimilar metals and is proportional to the temperature of the junction. the most common metallic junctions on a circuit board are solder-to- board trace and solder-to-component lead. figure 54 shows a cross-section view of the thermal voltage error sources. when the temperature of the pc board at one end of the component (t a1 ) differs from the temperature at the other end (t a2 ), the seebeck voltages are not equal, resulting in a thermal voltage error. this thermocouple error can be reduced by using dummy components to match the thermoelectric error source. placing the dummy component as close as possible to its partner ensures both seebeck voltages are equal, thus canceling the thermocouple error. maintaining a constant ambient temperature on the circuit board further reduces this error. the use of a ground plane helps distribute heat throughout the board and also reduces emi noise pickup. surface mount component component lead solder pc board copper trace t a2 if t a1 t a2 , then v ts1 + v sc1 v ts2 + v sc2 t a1 v sc1 v ts1 + ? + ? v sc2 v ts2 + + ? ? 01104-054 figure 54. mismatch in seebeck voltages causes a thermoelectric voltage error v out v in ad8571/ad8572/ ad8574 a v = 1 + (r f /r1) r f r s = r1 r1 01104-055 figure 55. using dummy co mponents to cancel thermoelectric voltage errors
ad8571/ad8572/ad8574 rev. b | page 17 of 24 0 ?20 ?40 ?60 ?80 ?100 ?120 012345678910 01104-057 output signal frequency (khz) v s = 5v a v = 60db 1/f noise characteristics another advantage of auto-zero amplifiers is their ability to cancel flicker noise. flicker noise, also known as 1/f noise, is noise inherent in the physics of semiconductor devices and increases 3 db for every octave decrease in frequency. the 1/f corner frequency of an amplifier is the frequency at which the flicker noise is equal to the broadband noise of the amplifier. at lower frequencies, flicker noise dominates, causing higher degrees of error for sub-hertz frequencies or dc precision applications. because the ad857x amplifiers are self-correcting op amps, they do not have increasing flicker noise at lower frequencies. in essence, low frequency noise is treated as a slowly varying offset error and is greatly reduced as a result of autocorrection. the correction becomes more effective as the noise frequency approaches dc, offsetting the tendency of the noise to increase exponentially as frequency decreases. this allows the ad857x to have lower noise near dc than standard low noise amplifiers that are susceptible to 1/f noise. figure 57. spectral analysis of ad857x output with 60 db gain figure 58 shows the spectral output of an ad8572 configured in a high gain (60 db) with a 1 mv input signal applied. note the absence of any imd products in the spectrum. the signal-to- noise (snr) ratio of the output signal is better than 60 db, or 0.1%. random auto-zero correction eliminates intermodulation distortion 0 ?20 ?40 ?60 ?80 ?100 ?120 012345678910 01104-058 v s = 5v a v = 60db frequency (khz) the ad857x can be used as a conventional op amp for gains up to 1 mhz. the auto-zero correction frequency of the device continuously varies, based on a pseudorandom generator with a uniform distribution from 2 khz to 4 khz. the randomization of the autocorrection clock creates a continuous randomization of intermodulation distortion (imd) products that show up as simple broadband noise at the output of the amplifier. this noise naturally combines with the amplifier voltage noise in a root-squared-sum fashion, resulting in an output free of imd. figure 56 shows the spectral output of an ad8572 with the amplifier configured for unity gain and the input grounded. figure 57 shows the spectral output with the amplifier configured for a gain of 60 db. figure 58. spectral analysis of ad857x in high gain with an input signal 01104-056 0 ?20 ?40 ?80 ?60 ?120 ?140 ?100 ?160 12345678910 output signal frequency (khz) v s = 5v a v = 0db figure 56. spectral analysis of ad857x output in unity gain configuration
ad8571/ad8572/ad8574 rev. b | page 18 of 24 broadband and external r esistor noise considerations the total broadband noise output from any amplifier is primarily a function of three types of noise: input voltage noise from the amplifier, input current noise from the amplifier, and johnson noise from the external resistors used around the amplifier. input voltage noise, or e n , is strictly a function of the amplifier used. the johnson noise from a resistor is a function of the resistance and the temperature. input current noise, or i n , creates an equivalent voltage noise proportional to the resistors used around the amplifier. these noise sources are not correlated with each other and their combined noise sums in a root- squared-sum fashion. the full equation is given as 2/12 2 , ])(4[ sns n totaln riktree ++= (15) where: e n = input voltage noise of the amplifier. i n = input current noise of the amplifier. r s = source resistance connected to the noninverting terminal. k = boltzmanns constant (1.38 10 ?23 j/k). t = ambient temperature in kelvin (k = 273.15 + c). the input voltage noise density, e n , of the ad857x is 51 nv/hz, and the input noise, i n , is 2 fa/hz. the e n, total is dominated by input voltage noise provided the source resistance is less than 172 k. with source resistance greater than 172 k, the overall noise of the system is dominated by the johnson noise of the resistor itself. because the input current noise of the ad857x is very small, i n does not become a dominant term unless r s is greater than 4 g, which is an impractical value of source resistance. the total noise, e n , total , is expressed in volts-per-square-root hertz, and the equivalent rms noise over a certain bandwidth can be found as bw ee totaln n = , (16) where bw is the bandwidth of interest in hertz. output overdrive recovery the ad857x amplifiers have an excellent overdrive recovery of only 200 s from either supply rail. this characteristic is par- ticularly difficult for autocorrection amplifiers, because the nulling amplifier requires a substantial amount of time to error correct the main amplifier back to a valid output. figure 29 and figure 30 show the positive and negative overdrive recovery time for the ad857x. the output overdrive recovery for an autocorrection amplifier is defined as the time it takes for the output to correct to its final voltage from an overload state. it is measured by placing the amplifier in a high gain configuration with an input signal that forces the output voltage to the supply rail. the input voltage is then stepped down to the linear region of the amplifier, usually to halfway between the supplies. the time from the input signal step-down to the output settling to within 100 v of its final value is the overdrive recovery time. many competitors auto- correction amplifiers require a number of auto-zero clock cycles to recover from output overdrive and some can take several milliseconds for the output to settle properly. input overvoltage protection although the ad857x is a rail-to-rail input amplifier, care should be taken to ensure that the potential difference between the inputs does not exceed 5 v. under normal operating condi- tions, the amplifier corrects its output to ensure the two inputs are at the same voltage. however, if the device is configured as a comparator, or is under some unusual operating condition, the input voltages may be forced to different potentials. this could cause excessive current to flow through internal diodes in the ad857x used to protect the input stage against overvoltage. if either input exceeds either supply rail by more than 0.3 v, large amounts of current begin to flow through the esd protection diodes in the amplifier. these diodes are connected between the inputs and each supply rail to protect the input transistors against an electrostatic discharge event and are normally reverse-biased. however, if the input voltage exceeds the supply voltage, these esd diodes become forward-biased. without current-limiting, excessive amounts of current can flow through these diodes causing permanent damage to the device. if inputs are subject to overvoltage, appropriate series resistors should be inserted to limit the diode current to less than 2 ma. output phase reversal output phase reversal occurs in some amplifiers when the input common-mode voltage range is exceeded. as common-mode voltage is moved outside of the common-mode range, the outputs of these amplifiers suddenly jump in the opposite direction to the supply rail. this is the result of the differential input pair shutting down, causing a radical shifting of internal voltages that results in the erratic output behavior. the ad857x amplifier has been carefully designed to prevent any output phase reversal, provided both inputs are maintained within the supply voltages. if one or both inputs could exceed either supply voltage, a resistor should be placed in series with the input to limit the current to less than 2 ma to ensure the output does not reverse its phase.
ad8571/ad8572/ad8574 rev. b | page 19 of 24 capacitive load drive the ad857x has excellent capacitive load driving capabilities and can safely drive up to 10 nf from a single 5 v supply. although the device is stable, capacitive loading limits the bandwidth of the amplifier. capacitive loads also increase the amount of overshoot and ringing at the output. an rc snubber network, shown in figure 59 , can be used to compensate the amplifier against capacitive load ringing and overshoot. 5v v out v in 200mv p-p ad8571/ ad8572/ ad8574 c l 4.7nf cx 0.47f rx 60 ? + ? 01104-059 figure 59. snubber network configuration for driving capacitive loads although the snubber does not recover the loss of amplifier bandwidth from the load capacitance, it does allow the amplifier to drive larger values of capacitance while maintaining a minimum of overshoot and ringing. figure 60 shows the output of an ad857x driving a 1 nf capacitor with and without a snubber network. 10 s 100mv v s = 5v c load = 4.7nf without s nubber with s nubber 01104-060 figure 60. overshoot and ringing are substantially reduced using a snubber network the optimum value for the resistor and capacitor is a function of the load capacitance and is best determined empirically since actual c load includes stray capacitances and can differ substan- tially from the nominal capacitive load. table 5 shows some snubber network values that can be used as starting points. table 5. snubber network values for driving capacitive loads c load rx cx 1 nf 200 1 nf 4.7 nf 60 0.47 f 10 nf 20 10 f power-up behavior on power-up, the ad857x settles to a valid output within 5 s. figure 61 shows an oscilloscope photo of the output of the amplifier along with the power supply voltage, and figure 62 shows the test circuit. with the amplifier configured for unity gain, the device takes approximately 5 s to settle to its final output voltage, hundreds of microseconds faster than many other autocorrection amplifiers. 5s 1v v out v+ 0v 0v bottom trace = 2v/div top trace = 1v/div 01104-061 figure 61. ad857x output behavior on power-up 100k ? 100k ? v sy = 0v to 5 v v out 0 1104-062 ad8571/ ad8572/ ad8574 figure 62. ad857x test circuit for turn-on time
ad8571/ad8572/ad8574 rev. b | page 20 of 24 applications 5 v precision strain gage circuit the extremely low offset voltage of the ad8572 makes it an ideal amplifier for any application requiring accuracy with high gains, such as a weigh scale or strain gage. figure 63 shows a configura- tion for a single supply, precision strain gage measurement system. a ref192 provides a 2.5 v precision reference voltage for a2. the a2 amplifier boosts this voltage to provide a 4.0 v reference for the top of the strain gage resistor bridge. q1 provides the current drive for the 350 bridge network. a1 is used to amplify the output of the bridge with the full-scale output voltage equal to ( ) b r 2r1r + 2 (17) where r b is the resistance of the load cell. using the values given in figure 63 , the output voltage linearly varies from 0 v with no strain to 4 v under full strain. v out ad8572-a r3 17.4k ? r4 100? r1 17.4k ? r2 100? 0v to 4v note: use 0.1% tolerance resistors. 20k ? a1 ad8572-b ref192 12k? 1k ? 5v 2.5v 6 4 3 2 4.0v 40mv full-scale a2 350 ? load cell q1 2n2222 or equivalent 01104-063 figure 63. 5 v precision strain gage amplifier 3 v instrumentation amplifier the high common-mode rejection, high open-loop gain, and operation down to 3 v of supply voltage make the ad857x an excellent choice of op amp for discrete single-supply instrumen- tation amplifiers. the common-mode rejection ratio of the ad857x is greater than 120 db, but the cmrr of the system is also a function of the external resistor tolerances. the gain of the difference amplifier shown in figure 64 is given as ? ? ? ? ? ? ? ? ? ? ? ? ? + ? ? ? ? ? ? + = 1r 2r 2v 2r 1r 4r3r 4r 1vv out 1 (18) v2 v1 v out r1 r1 r1 r3 r4 r4 r3 r2 r2 r2 ad8571/ ad8572/ ad8574 if = , then v out = (v1 ? v2) 01104-064 figure 64. using the ad857x as a difference amplifier in an ideal difference amplifier, the ratio of the resistors is set exactly equal to 3r 4r 1r 2r a v == (19) setting the output voltage of the system to )( 2v1vav v out ? = (20) due to finite component tolerance, the ratio between the four resistors is not exactly equal, and any mismatch results in a reduction of common-mode rejection from the system. referring to figure 64 , the exact common-mode rejection ratio can be expressed as r2r3 r1r4 r2r3 r2r4 1r4r cmrr 22 2 ? + + = (21) in the three-op amp instrumentation amplifier configuration shown in figure 65 , the output difference amplifier is set to unity gain with all four resistors equal in value. if the tolerance of the resistors used in the circuit is given as , the worst-case cmrr of the instrumentation amplifier is = 2 1 min cmrr (22) v out r r r r ad8574-c v2 r r v1 r g ad8574-b a d8574-a r trim v out = 1 + 2r r g (v1 ? v2) 01104-065 figure 65. discrete instrumentation amplifier configuration thus, using 1% tolerance resistors results in a worst-case system cmrr of 0.02, or 34 db. therefore, either high precision resistors or an additional trimming resistor, as shown in figure 65 , should be used to achieve high common-mode rejection. the value of this trimming resistor should be equal to the value of r multiplied by its tolerance. for example, using 10 k resistors with 1% tolerance would require a series trimming resistor equal to 100 . high accuracy thermocouple amplifier figure 66 shows a k-type thermocouple amplifier configuration with cold junction compensation. even from a 5 v supply, the ad8571 can provide enough accuracy to achieve a resolution of better than 0.02c from 0c to 500c. d1 is used as a tempera- ture measuring device to correct the cold-junction error from
ad8571/ad8572/ad8574 rev. b | page 21 of 24 the thermocouple and should be placed as close as possible to the two terminating junctions. with the thermocouple measuring tip immersed in a 0c ice bath, r6 should be adjusted until the output is at 0 v. using the values shown in figure 66 , the output voltage tracks temperature at 10 mv/c. for a wider range of temperature measurement, r9 can be decreased to 62 k. this creates a 5 mv/c change at the output, allowing measurements of up to 1000c. ad8572 3 8 4 0v to 5v (0c to 500c) 5v 0.1f 10f ref02ez 0.1f 12v 2 6 4 ++ ?? d1 1n4148 5v k-type thermocouple 40.7v/c 1 2 r2 2.74k ? r6 200 ? r3 53.6k ? r4 5.62k ? r1 10.7k ? r5 40.2k ? r9 124k ? r8 453 ? + 01104-066 figure 66. precision k-type thermocouple amplifier with cold-junction compensation precision current meter because of its low input bias current and superb offset voltage at single-supply voltages, the ad857x is an excellent amplifier for precision current monitoring. its rail-to-rail input allows the amplifier to be used as either a high-side or a low-side current monitor. using both amplifiers in the ad8572 provides a simple method to monitor both current supply and return paths for load or fault detection. figure 67 shows a high-side current monitor configuration. here, the input common-mode voltage of the amplifier is at or near the positive supply voltage. the rail-to-rail input of the amplifier provides a precise measurement, even with the input common-mode voltage at the supply voltage. the cmos input structure does not draw any input bias current, ensuring a minimum of measurement error. the 0.1 resistor creates a voltage drop to the noninverting input of the ad857x. the output of the amplifier is corrected until this voltage appears at the inverting input. this creates a current through r1 that in turn flows through r2. the monitor output is given by l sense i 1r r 2routput monitor u u (23) using the components shown in figure 67 , the monitor output transfer function is 2.5 v/a. figure 68 shows the low-side monitor equivalent. in this circuit, the input common-mode voltage to the ad8572 is at or near ground. again, a 0.1 resistor provides a voltage drop propor- tional to the return current. the output voltage is given as uu l sense out ir 1r 2r vv (24) for the component values shown in figure 68 , the output transfer function decreases from v at C2.5 v/a. 8 1 4 3 3v 0.1f v+ i l g s d 2 m1 si9433 monitor output 3v 1/2 ad8572 r1 100 ? r2 2.49k ? r sense 0.1 ? 01104-067 figure 67. high-side load current monitor v+ return to ground 1/2 ad8572 v + v out q1 r sense 0.1 ? r1 100 ? r2 2.49k ? 01104-068 figure 68. low-side load current monitor precision voltage comparator the ad857x can be operated open-loop and used as a precision comparator. the ad857x has less than 50 v of offset voltage when run in this configuration. the slight increase of offset voltage stems from the fact that the autocorrection architecture operates with lowest offset in a closed-loop configuration, that is, one with negative feedback. with 50 mv of overdrive, the device has a propagation delay of 15 s on the rising edge and 8 s on the falling edge. care should be taken to ensure the maximum differential voltage of the device is not exceeded. for more information, refer to the input overvoltage protection section.
ad8571/ad8572/ad8574 rev. b | page 22 of 24 outline dimensions compliant to jedec standards mo-187-aa 0.80 0.60 0.40 8 0 4 8 1 5 pin 1 0.65 bsc seating plane 0.38 0.22 1.10 max 3.20 3.00 2.80 coplanarity 0.10 0.23 0.08 3.20 3.00 2.80 5.15 4.90 4.65 0.15 0.00 0.95 0.85 0.75 figure 69. 8-lead mini small outline package [msop] (rm-8) dimensions shown in millimeters controlling dimensions are in millimeters; inch dimensions (in parentheses) are rounded-off millimeter equivalents for reference only and are not appropriate for use in design. compliant to jedec standards ms-012-a a 060506-a 0.25 (0.0098) 0.17 (0.0067) 1.27 (0.0500) 0.40 (0.0157) 0.50 (0.0196) 0.25 (0.0099) 45 8 0 1.75 (0.0688) 1.35 (0.0532) seating plane 0.25 (0.0098) 0.10 (0.0040) 4 1 85 5.00 (0.1968) 4.80 (0.1890) 4.00 (0.1574) 3.80 (0.1497) 1.27 (0.0500) bsc 6.20 (0.2440) 5.80 (0.2284) 0.51 (0.0201) 0.31 (0.0122) coplanarity 0.10 figure 70. 8-lead standard small outline package [soic_n] narrow body (r-8) dimensions shown in millimeters and inches 8 5 41 pin 1 0.65 bsc seating plane 0.15 0.05 0.30 0.19 1.20 max 0.20 0.09 8 0 6.40 bsc 4.50 4.40 4.30 3.10 3.00 2.90 coplanarit y 0.10 0.75 0.60 0.45 compliant to jedec standards mo-153-aa figure 71. 8-lead thin shrink small outline package [tssop] (ru-8) dimensions shown in millimeters 4.50 4.40 4.30 14 8 7 1 6.40 bsc pin 1 5.10 5.00 4.90 0.65 bsc seating plane 0.15 0.05 0.30 0.19 1.20 max 1.05 1.00 0.80 0.20 0.09 8 0 0.75 0.60 0.45 coplanarity 0.10 compliant to jedec standards mo-153-ab-1 figure 72. 14-lead thin shrink small outline package [tssop] (ru-14) dimensions shown in millimeters
ad8571/ad8572/ad8574 rev. b | page 23 of 24 controlling dimensions are in millimeters; inch dimensions (in parentheses) are rounded-off millimeter equivalents for reference only and are not appropriate for use in design. compliant to jedec standards ms-012-ab 060606-a 14 8 7 1 6.20 (0.2441) 5.80 (0.2283) 4.00 (0.1575) 3.80 (0.1496) 8.75 (0.3445) 8.55 (0.3366) 1.27 (0.0500) bsc seating plane 0.25 (0.0098) 0.10 (0.0039) 0.51 (0.0201) 0.31 (0.0122) 1.75 (0.0689) 1.35 (0.0531) 0.50 (0.0197) 0.25 (0.0098) 1.27 (0.0500) 0.40 (0.0157) 0.25 (0.0098) 0.17 (0.0067) coplanarity 0.10 8 0 45 figure 73. 14-lead standard small outline package [soic_n] narrow body (r-14) dimensions shown in millimeters and (inches) ordering guide temperature package package model range description option branding ad8571ar ?40c to +125c 8-lead soic_n r-8 ad8571ar-reel ?40c to +125c 8-lead soic_n r-8 ad8571ar-reel7 ?40c to +125c 8-lead soic_n r-8 ad8571arz 1 ?40c to +125c 8-lead soic_n r-8 ad8571arz-reel 1 ?40c to +125c 8-lead soic_n r-8 ad8571arz-reel7 1 ?40c to +125c 8-lead soic_n r-8 ad8571arm-r2 ?40c to +125c 8-lead msop rm-8 aja ad8571arm-reel ?40c to +125c 8-lead msop rm-8 aja AD8571ARMZ-R2 1 ?40c to +125c 8-lead msop rm-8 aja# ad8571armz-reel 1 ?40c to +125c 8-lead msop rm-8 aja # ad8572ar ?40c to +125c 8-lead soic_n r-8 ad8572ar-reel ?40c to +125c 8-lead soic_n r-8 ad8572ar-reel7 ?40c to +125c 8-lead soic_n r-8 ad8572arz 1 ?40c to +125c 8-lead soic_n r-8 ad8572arz-reel 1 ?40c to +125c 8-lead soic_n r-8 ad8572arz-reel7 1 ?40c to +125c 8-lead soic_n r-8 ad8572aru ?40c to +125c 8-lead tssop ru-8 ad8572aru-reel ?40c to +125c 8-lead tssop ru-8 ad8572aruz 1 ?40c to +125c 8-lead tssop ru-8 ad8572aruz-reel 1 ?40c to +125c 8-lead tssop ru-8 ad8574ar ?40c to +125c 14-lead soic_n r-14 ad8574ar-reel ?40c to +125c 14-lead soic_n r-14 ad8574ar-reel7 ?40c to +125c 14-lead soic_n r-14 ad8574arz 1 ?40c to +125c 14-lead soic_n r-14 ad8574arz-reel 1 ?40c to +125c 14-lead soic_n r-14 ad8574arz-reel7 1 ?40c to +125c 14-lead soic_n r-14 ad8574aru ?40c to +125c 14-lead tssop ru-14 ad8574aru-reel ?40c to +125c 14-lead tssop ru-14 ad8574aruz 1 ?40c to +125c 14-lead tssop ru-14 ad8574aruz-reel 1 ?40c to +125c 14-lead tssop ru-14 1 z = pb-free part, # denote lead-free product may be top or bottom marked.
ad8571/ad8572/ad8574 rev. b | page 24 of 24 notes ?2006 analog devices, inc. all rights reserved. trademarks and registered trademarks are the property of their respective owners. c01104-0-9/06(b)

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